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Partcl

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Design a chip in minutes

Spring 2025Founded 2025San Francisco, CA, USA
Generate ideas β†’
↻ Pivot / rename signal

This company has previously operated under β€œAionCAD”. A rename frequently marks a pivot in positioning or product β€” useful raw material for variant ideas.

About

Partcl modernizes chip design automation with physics-informed models powered by GPU acceleration. Our tools run up to 700Γ— faster than legacy solutions, cutting weeks off development and unlocking AI-driven optimization.

Founders Β· 2

William Salcedo
William SalcedoFounder
NvidiaStanfordCornell

CEO at Partcl. Previously at Nvidia, Stanford, and Cornell. I taped-out two chips from scratch as an undergrad and developed one of the earliest chips designed by LLMs. My research at Stanford included using AI techniques to verify circuits.

Vamshi Balanaga
Vamshi BalanagaFounder
AppleStanfordBerkeley

CTO at Partcl. Previously built embedded ML models at Apple, laser weeding robots at Carbon Robotics, and warehouse automation robots at Fulfil Solutions. Built and launched multiple rockets while running the avionics team at Space Enterprise at Berkeley, Stanford EECS PhD (dropout), UC Berkeley Physics.

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